Open Courses

.
Computer Organization DIONISIOS PNEVMATIKATOS - undergraduate - (A-) School of Electronic and Computer Engineering, Technical University of Crete Introduction to design processor, machine language as interface between hardware and software. Internal processor organization. Implementation of a processor using simple modules (registers, multiplexers, logic gates). Datapath and controlpath design. Interrupts and interrupt handling at the control module. Cache memories, virtual memory. Modern implementation of processors based on pipelining.
Open Courses Development Aggelos Bletsas - undergraduate - (A-) School of Electronic and Computer Engineering, Technical University of Crete Connection, Composition and Completion (3Cs) basic theoretical knowledge of telecommunications engineering, while pilot training in a real environment. Data transceivers and system parameters. Receiver parameters: noise figure, compression point (IP2), intermodulation and third-order intercept point (IP3), spurious receiver response. Transmitter parameters: frequency stability and spurious signals, output power efficiency, intermodulation, crystal reference oscillators, PLLs. Architecture receivers ...
Τηλεπικοινωνιακά Συστήματα ΙI Aggelos Bletsas - undergraduate - (A+) School of Electronic and Computer Engineering, Technical University of Crete Το μάθημα προσφέρει το απαραίτητο θεωρητικό υπόβαθρο μετατροπής μιας διακριτής πηγής πληροφορίας σε bits και σχεδίασης modemγια την μεταφορά των bits σε κανάλι προσθετικού λευκού κανονικού θορύβου (AWGN) υπό περιορισμό ισχύος ή εύρους ζώνης. Συγκεκριμένα, εισάγει την μετατροπή μιας διακριτής πηγής πληροφορίας σε bits (εξηγώντας πώς κάνει συμπίεση δεδομένων ο υπολογιστής μας), επεκτείνει τον σχεδιασμό modem στην περίπτωση της περιορισμένης ισχύος (την περίπτωση περιορισμένου εύρους ζώνης την είδ ...
Digital Design Apostolos Dollas - undergraduate - (A+) School of Electronic and Computer Engineering, Technical University of Crete Logic Design is an introductory course on digital design. It is a self-contained course in that it has no prerequisites, and it is offered to first-year ECE students. The course has theory, exercises, and laboratory exercises for a thorough coverage of the material.
Digital Signal Processing Michalis Zervakis - undergraduate - (A-) School of Electronic and Computer Engineering, Technical University of Crete Discrete-time signals and systems, Sampling and Quantization effects, Fourier Transform: properties and applications, Ζ-Transform: properties and applications, Sampling and reconstruction of analog signals, Changing sampling frequency: downsampling and upsampling, Power spectrum estimation, Processing of analog signals with digital filters, Transform analysis of linear time-invariant systems, Minimum phase systems, Structures for discrete-time and digital filters, Design and implementation of infinite impulse response (IIR) and finite impulse response (FIR) filters, Transform and windowing methods
Digital Image Processing Michalis Zervakis - undergraduate - (A+) School of Electronic and Computer Engineering, Technical University of Crete General principles and modeling of digital images. Image Perception. Color representation and transformations. 2-D Sampling, 2-D Fourier and other transforms. Image description and processing using vectors and matrix operators. Image enhancement: Histogram equalization and mapping, contrast enhancement, low-pass and highpass filters in two dimensions. Image restoration: Deterministic and stochastic methods. Optimization for the design of image restoration filters, comparisons and applications. Image coding and compression: JPEG, MPEG. Image analysis and segmentation methods
Modeling and Performance Evaluation of Computer Communication Networks MICHAEL PATERAKIS - undergraduate - (A-) School of Electronics & Computer Engineering, Technical University of Crete Introduction to modeling of computer communication networks using stochastic processes: brief review of discrete random variables, Bernoulli processes and sums of independent random variables, Poisson processes and their main properties, discrete time Markov Chains (properties, classification of states, limiting behavior). Introduction to modeling of computer communication networks using Queueing Theory (Little’s Theorem, the M/M/1, M/M/m, M/M/m/m markovian queues, the M/G/1 queue with generalized service times distribution, the M/G/1 queue with vacations of the server, priority queues). Design, modeling and performance evaluation of multiple access protocols and transmission scheduling schemes for packet radio networks and wireless integrated services networks.
Computer Architecture DIONISIOS PNEVMATIKATOS - undergraduate - (A-) School of Electronic and Computer Engineering, Technical University of Crete This course covers advanced techniques for the effective execution of computations and programs. It focuses on the design of Instruction Set Architectures and the quantitative evaluation of design options using benchmarks. Then it covers advanced techniques for maximizing the overlapped execution of instructions, speculative and out-of-order execution, etc, while maintatining the illusion of in-order instruction execution as specified by the programmer/compiler. Then it covers advanced memory system design (main memory and caches), the effective HW support of virtual memory (virtual address translation, TLBs, etc), multicore- and multithreaded-processors, and IO systems.
Digital Computers Dionysios Pnevmatikatos - undergraduate - (A-) School of Electronic and Computer Engineering, Technical University of Crete This course aims in understanding the basic organization of a computer system, the use of basic (machine-level) instructions, memory organization and its use to represent data-structures used in high-level programming languages. It also covers the communication between the processor, the memory and the peripherals, interrupts, exceptions and DMAs.
Advanced Logic Design Apostolos Dollas - undergraduate - (A+) School of Electronic and Computer Engineering, Technical University of Crete Introduction to Hardware Description Languages (HDL). Structural and behavioural models, schematic capture,simulation, correct operation verification, circuit timing analysis. Advanced logic design, one–hot encoding algorithmic design methods. Circuit fan–in and fan–out, critical path. Spatial and timing complexity, O() complexity for logic circuits. Data path and control path design. Finite State Machines, state minimization. Fast arithmetic circuits: carry look–ahead, carry select and carry–save adders, multipliers, dividers. Fixed and floating–point arithmetic. Synthesis of logic circuits.