Computer Architecture 2


The course covers fundamental and advanced Computer Architecture issues emphasizing on the structure of single- and multi-core processors, and several memory layers including cache and main memory. In the framework of the course exercises the students learn about the hardware description language VHDL


Objectives

• The learning outcome and goal is the knowledge of fundamental and advances issues concerning computer architecture as well as the hardware language VHDL. • With the completion of the topic the students will be able to: 1. Comprehend the features of advanced single and multi-core processors and memories 2. Design and Implement microcomputers interconnecting CPUs with memories and peripheral circuits. 3. Know the VHDL hardware description language (including entity/architecture structures, combinatorial circuit description like half and full adders, multi-bit adders, comparators, encoder/decoders, (de)multiplexors as well as sequential circuits like flip flops, register/latches, counters, ALUs, CPUs).


Prerequisites

Successive attendance in Computer Architecture 1


Syllabus

In the matter of the course Computer Architecture II include: - Review of PC structure (CPU, main memory RAM-ROM, input-output) - Interface RAM / ROM in CPU - Secondary storage (hard drives, optical disks) - Cache (cache) - Interleaving / Paging (paging) Main Memory, Virtual (virtual) memory, segmentation (segmentation) - Processors partially overlapping Function (pipeline) - Synchronous and parallel processors, Pentium description features During the workshops, students will learn the VHDL hardware description language and environment Altera MaxPlus II of the exercises used in previous years

COURSE DETAILS

Level:

Type:

Undergraduate

(A+)


Instructors: Nikos Petrellis
Department: Computer Science and Engineering
Institution: TEI of Thessaly
Subject: Computer Science, Information Technology, Telecommunications
Rights: CC - Attribution-NonCommercial-NoDerivatives

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